1. Technical Field
The present invention relates in general to electrostatic discharge protection, and in particular to electrostatic discharge protection for integrated circuits. Still more particularly, the present invention relates to a microelectromechanical switch (MEMS) for electrostatic discharge protection.
2. Description of the Related Art
An electrostatic charge or static electricity possessed by a human can reach levels of over 1000 volts. Modern computer circuitry utilizes voltages lower than 1.5 volts in digital logic circuits. Consequently, the transfer of a static charge from a human into computer circuitry can cause serious damage to electronic circuitry. Protection of electronic circuits from electrostatic discharge (ESD) has been an onerous problem since the advent of the transistor.
A human can build up a charge on his or her body through mechanical motion against surfaces such as carpet (i.e, triboelectric charging). When the fingertip of a charged human comes in close proximity to a conductor which is coupled to a circuit board, the carried charge rapidly discharges through every circuit coupled to the conductor. In the ESD process many sensitive circuits can be irreversibly damaged.
Complementary metal-oxide semiconducity (CMOS) circuits and integrated circuits having small geometries are now widely utilized in the home and office. Environmental conditions in the home and office subject sensitive circuits to electrostatic discharge by humans. As manufacturers attempt to increase the reliability of electronic equipment, prevention of ESD damage has become a primary concern.
One method implemented to protect electronic circuits from ESD damage is to incorporate filters on the input of integrated circuits. ESD filters are typically comprised of resistors and diodes or any combination thereof. FIG. 1 depicts a typical ESD filter circuit which utilizes resistors and reverse-biased diodes for decoupling ESD transients. Resistor 4, first diode 6 and second diode 8 provide a dissipative path for ESD transients.
The resistance of resistor 4 and the inherent capacitance associated with the reverse-biased state of first diode 6 and the reverse-bias state of second diode 8 significantly slow down the attainable data transmission speed of an integrated circuit.
State-of-the-art microprocessors cannot attain data transmission and reception of digital data on the order of one gigahertz due to the degradation of parasitic characteristics inherent to existing ESD filter designs.
A wide variety of designs for accomplishing on chip ESD protection or protection within integrated circuits have been developed. The primary function of an ESD protection circuit is to direct an ESD away from the circuit to be protected. Thus, if a transistor is utilized for ESD protection, the protection transistor must turn ON before the silicon junctions to be protected reach their field breakdown voltage.
Traditional on chip ESD protection circuit designs involve a trade off between increased capacitance on the input and output (I/O) transmission lines and the transient voltage dissipation capacity.
Integrated circuits utilizing silicon-on-insulator (SOI) technology are sensitive to increased capacitance on transmission lines. SOI technology places the electron transport layer above an insulator. Hence, the electron transport layer is electrically isolated from the substrate of the integrated circuit.
One method of creating an isolated silicon layer is by utilizing a separation by implantation of oxygen (SIO), SIMOX or SOI CMOS method. In a typical SIO method, oxygen is implanted in a single crystal silicon wafer by a bombardment technique which controls the depth of penetration of the silicon substrate by oxygen atoms. A layer of silicon oxide is formed below the thin layer of silicon which has been penetrated by oxygen atoms.
The insulator in popular SOI CMOS technologies is silicon dioxide, an electrical insulator that is also a poor thermal conductor. When ESD protection in SOI circuits utilizes bypass diodes for ESD protection, the Joule heat developed in the diodes during an ESD is thermally trapped locally in the region around the diode and the transient temperature rise is often sufficient to melt down the semiconductor junction which forms the diode. The self-heating effect and resulting silicon junction melt down is not well understood by those skilled in the art.
Self-heating and melt down presents serious reliability problems for deep sub-micron SOI CMOS technology utilizing silicon junctions for ESD protection. Circuits implemented on an electrically isolated layer are more susceptible to damage due to meltdown from electrostatic discharge than traditional complimentary metallic oxides semiconductor (CMOS) circuits.
Although mechanical switches are robust and can dissipate thousands of volts, mechanical switches are typically too slow to be utilized in ESD protection circuits. Further, mechanical switches can handle a significant amount of instantaneous currents without failing. However, mechanical switches are also typically too large to be implemented in proximity to an integrated circuit.
It should therefore be apparent that there is a need for improved electrostatic discharge protection for integrated circuits. Additionally, it would be desirable to provide a small electromechanical switch which could provide electrostatic discharge protection.